From eb5bfad773f01c58519f77c6f90ad08cdf8c77c2 Mon Sep 17 00:00:00 2001 From: Qin Jin <137202313@qq.com> Date: Sat, 4 Feb 2023 23:07:10 +0800 Subject: [PATCH] slli --- xgriscv_datapath.v | 6 +++--- 1 file changed, 3 insertions(+), 3 deletions(-) diff --git a/xgriscv_datapath.v b/xgriscv_datapath.v index d63bdf3..07e56c7 100644 --- a/xgriscv_datapath.v +++ b/xgriscv_datapath.v @@ -49,7 +49,7 @@ module datapath( wire [`XLEN-1:0] rdata1, rdata2, wdata; wire [`RFIDX_WIDTH-1:0] waddr = rd; wire [`XLEN-1:0] a, b; - + //更新pc wire stall = 1'b0; @@ -57,12 +57,12 @@ module datapath( pcenr pcr(clk, reset, ~stall, newpc, pc); addr_adder pcadder(pc, `ADDR_SIZE'b100, newpc); - + wire [4:0] shamt = instr[24:20]; //处理mux mux2 #(32) mx0(rdata2, immout, alusrcb, b); //alu input b mux2 #(32) mx1(aluout, readdata, memtoreg, wdata); // wdata input mux3 #(32) mx2(rdata1, 0, pc, alusrca, a); //alu input a - mux2 #(5) mx3(rdata2[4:0], instr[24:20], itype, shamt); //alu input shamt + //mux2 #(5) mx3(rdata2[4:0], instr[24:20], itype, shamt); //alu input shamt imm im(iimm, simm, bimm, uimm, jimm, immctrl, immout); -- GitLab